Digital Design Engineer(高雄)

Jobinhalt

Job Description

1. FPGA platform resource and interface evaluation

2. Evaluation (complexity vs. performance), RTL implementation and verification of ISP (Image Signal Processing) algorithm on FPGA

3. Evaluation (complexity vs. performance), RTL implementation and verification of image compression algorithm on FPGA

4. Evaluation (complexity vs. performance), RTL implementation and verification of error correction algorithm for data storage on FPGA

5. Evaluation (complexity vs. performance), RTL implementation and verification of data encryption algorithm on FPGA

6. FPGA system integration including sensor control interface, high-speed data transferring interface, display interface, power control, etc.

Job Requirements

1. Experience in digital design and verification on FPGA platform

2. Experience in ISP, compression, error correction and encryption algorithm and application is better

3. Experience in high-speed interface, sensor interface and display interface is better

Location

Kaohsiung Software Technology Park(高雄軟體園區)