Sr Mgr Digital Engineering, #1187 (France, Taiwan or India)

工作内容

Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional Design Manager to join our team in France. Candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer.

You will join the R&D team to lead an international team of Design Engineers and Architects working on complex semiconductor IP developments.

TEAM MANAGEMENT

• Line management of a large and growing team of design engineers
• Mentor and support team members in their career development
• Provide technical direction to the design team and the overall organization on all aspects of design
• Contribute to the recruitment process

PROJECT MANAGEMENT

• Establish measurable and achievable goals with a view to continuously improve overall design productivity and quality
• Build strong partnerships with functional groups like verification, validation, and support, to effectively align design execution
• Lead project planning, staffing, execution and reporting
• Set milestones, assign and track tasks

DESIGN

• Drive design activities
• Contribute to strategic decisions on design methodology, tools, IP architecture and microarchitecture

Skills Requirement

• Verilog or VHDL RTL Design
• ASIC and FPGA design flow
• High performance computing system, processor, cache coherency, chipset and ASICs
• High speed interface protocols like PCIe, CCIX, CXL, Gen-Z, others
• High performance memory interfaces
• Knowledge on High Speed Serdes and PHY PMA
• Proficiency in programming and/or scripting languages (Python, Cshell…)

Your Profile

• 15 years minimum experience in semiconductor development
• Significant experience in technical lead, project management and people management
• Expertise in ASIC and FPGA design and associated tools
• Good English skills, communication skills, and willingness to work with an international team