水平: Mid-Senior level

工作类型: Full-time

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工作内容

Responsibilities:

• Analog circuit design,simulation and verification

• Guide layout engineer to complete and optimize the layout

• Test & debug for product

Key Competencies Required:

• Major in EE/ME and Master/Ph.D. degree.

• Above 5 years hands-on IC design experience on analog design, such as LDO, Bandgap, PLL, ADC/DAC, SRAM, etc. A plus with experience on image senor analog block design, and familiar with image sensor system.

• Experience on the test and debug of hi-speed interface circuits.

• 4.Good communication skills and team work spirit

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最后期限: 20-12-2024

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