Power Management Silicon Validation Engineer

工作内容

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Minimum qualifications:

• Bachelor’s degree in Electrical Engineering, a related field, or equivalent practical experience
• 3 years of experience developing random stress tests, silicon validation frameworks, or related infrastructure
• Experience in programming in C/C++
• Experience in ARM architecture and in IP level power management, DVFS, or SoC/CPU/Memory power management
  
  

Preferred qualifications:

• Experience executing tests on emulation platforms and/or FPGA and with board level debug
• Experience with complex system debug, embedded operating systems, and bare metal programming
• Experience with JTAG debuggers (e.g. Lauterbach)
• Knowledge of low power design and architecture techniques
• Knowledge of OS fundamentals
• Familiarity with PMIC and power modeling techniques
  
  

About The Job

Google engineers develop the next-generation technologies that change how users connect, explore, and interact with information and one another. As a member of an extraordinarily creative, motivated and talented team, you develop new products that are used by millions of people. We need our engineers to be versatile and passionate to take on new problems as we continue to push technology forward. If you get excited about building new things and working across discipline lines, then our team might be your next career step

In this role, you’ll be a part of Google’s Silicon team, working to enable Google’s continuous innovations. You’ll be responsible for bare-metal and OS-based validation, including both pre-silicon verification and post-silicon bring-up and validation, ensuring the delivery of high-quality silicon

Google’s mission is to organize the world’s information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people’s lives better through technology

Responsibilities

• Plan, develop, and execute tests to validate IP, subsystem, and system level power management
• Manage power correlation and power management design validation on pre-silicon and post-silicon platforms
• Interface with Software, Architecture, Design, and DV teams to create and execute test plans
• Support silicon debug and field failures
  
  

Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google’s EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form .