Package Engineer

工作内容

※ Job Contents:

1. Propose cost-effective/performance-driven IC package solutions, based on IP electrical/performance/cost requirements for footprint, mechanical, thermal and electrical considerations.

2. Hands-on physical design at advanced package, e.g., FCBGA substrate, InFO/CoWoS 3D-IC technology.

3. Co-Work with SI/PI and IP designers to optimize IP+PKG+System bump/ball map, as well as provide suggestions for on-die macros floor-planning.

4. Partner with Packaging suppliers and review OSAT’s technology roadmap for providing effective package technology solution.

5. Co-develop in-house advanced package technology roadmap for future generation of 3D-IC or FCBGA/FCCSP at high speed GLink and HBM.

※ Requirements:

1. Bachelor or master degree in Engineering, Electrical/Mechanical Engineering, Computer Science, or related engineering field.

2. 3+ years Hardware Engineering experience or related package design experience.

3. Familiar with Cadence Allegro APD/SiP/MCM and AutoCAD to propose package bump/ball map at early-stage.

4. Have hands-on experience at FCCSP/FCBGA substrate physical design (layout), or InFO/CoWoS interposer design, and design flows.