SoC Performance and Power Architect, Silicon

Job content

Google welcomes people with disabilities.

Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Banqiao District, New Taipei City, Taiwan 220; Xindian District, New Taipei City, Taiwan.Minimum qualifications:

• Master’s degree in Electrical Engineering, Computer Science, or equivalent practical experience.
• 5 years of experience in SoC performance analysis.
• Experience with SoC architecture and use case data path with IP performance KPI and power management concepts.
• Experience in software power optimizations (e.g., Android, Linux) and post-silicon power productization work.
  
  

Preferred qualifications:

• PhD in Electronics, Computer Engineering, or Computer Science, with an emphasis on computer architecture, performance and power analysis.
• Experience with performance for multimedia IPs in mobile SoCs (e.g., ISP, codecs, display processor).
• Experience with performance for memory systems in mobile SoCs.
• Experience with ASIC design flows from concept to post-silicon.
• Knowledge of the impact of software and architectural design decisions on system power and thermal behavior.
  
  

About The Job

Our computational challenges are so big, complex and unique we can’t just purchase off-the-shelf hardware, we’ve got to make it ourselves. Your team designs and builds the hardware, software and networking technologies that power all of Google’s services. As a Hardware Engineer, you design and build the systems that are the heart of the world’s largest and most powerful computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data centers affecting millions of Google users.

With your technical expertise, you lead projects in multiple areas of expertise (i.e., engineering domains or systems) within a data center facility, including construction and equipment installation/troubleshooting/debugging with vendors.

Google’s mission is to organize the world’s information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people’s lives better through technology.

Responsibilities

• Define and drive low power solutions for Google SoCs to optimize Power-Performance-Area (PPA) under peak current and thermal constraints.
• Create use case workload and data flow models for Day of Use (DoU) power evaluation and drive power and performance optimizations through SoC generations.
• Define performance/power KPIs and SoC/IP-level performance/power goals, guide architecture and design to achieve lower power goals to perform power roll ups and track power throughout the design cycle.
• Propose and drive power optimizations throughout the design process from concept to mass productization.
• Drive power-performance trade-off analysis for engineering reviews and product roadmap decisions.
  

Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google’s EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form .