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Multimedia Silicon Engineer
Ver: 122
Dia de atualização: 05-11-2024
Localização: Banqiao District New Taipei City
Categoria: Outro IT - Software Alta tecnologia Mecânico / Técnico Elétrica / Eletrônica
Indústria: Information Services Technology Information Internet
Tipo de empregos: Full-time
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Conteúdo do emprego
Google welcomes people with disabilities.Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Banqiao District, New Taipei City, Taiwan 220; Xindian District, New Taipei City, Taiwan.Minimum qualifications:
- Bachelor’s degree in Computer Science, Electrical Engineering, Computer Engineering, a related technical field, or equivalent practical experience.
- Experience with C/C++ or Verilog/SystemVerilog.
- Experience in Computer Architecture or Digital Designs.
- Master’s degree or PhD in Computer Science, Electrical Engineering, or a related technical field.
- 3 years of experience in RTL design or verification.
- Experience in designing, implementing, or validating RTL design.
- Experience in a scripting language such as C/C++ programming and software design skills.
- Knowledge of object-oriented programming.
In this role, you will be a part of Research and Development team developing high performance and low power hardware and software to enable Google’s continuous innovations in mobile image, vision, and AI processing. Your responsibilities include designing and verifying components and delivering the IPs to the system for integration.
Google’s mission is to organize the world’s information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people’s lives better through technology.
Responsibilities
- Perform RTL design and simulation using Verilog/SystemVerilog.
- Perform RTL verification using industry standard methodologies, participate in test planning, and coverage analysis.
- Create tools/scripts to automate tasks and track progress.
- Work with multi-disciplined and multi-site teams in RTL design, verification, or architecture/micro-architecture planning.
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Data limite: 20-12-2024
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