Senior Staff Digital Design Engineer

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About Marvell

At Marvell, we believe that infrastructure powers progress. That execution is as essential as innovation. That better collaboration builds better technology. Trusted by the world’s leading technology companies for 25 years, we move, store, process and secure the world’s data with semiconductor solutions designed for our customers’ current needs and future ambitions. Through a process of deep collaboration and transparency, we’re ultimately changing the way tomorrow’s enterprise, cloud, automotive, and carrier architectures transform—for the better.

The data infrastructure that our customers build has never been more critical to our global economy. It’s what’s keeping the world connected, businesses running, and information flowing. If you’re ready to excel, innovate, and truly enjoy your work, apply now for the position detailed below.

The Opportunity

Marvell is the leader of Automotive networking technology development offering a complete portfolio of high-quality AEC-Q100 qualified products and solutions with Ethernet PHY transceivers and switches supporting speeds from 100Mbps to 10Gbps. The enhanced safety and security features, high speed data transfer and process, and co-application processor platforms greatly meet the requirements for today and tomorrow’s in-vehicle networks.

You will join a global ASIC design team, to work in the areas of Design for Test (DFT) and Digital Design Implementation for Automotive Ethernet Switch and SOC products.

Job Responsibilities

Job Responsibilities (Digital Design and Implementation)

A team member will be involved in below design activities.

• Check RTL design quality; create timing constraints for synthesis and static timing analysis.
• Perform logic synthesis and deliver gate netlist for DFT insertion and physical design.
• Perform timing analysis and timing signoff for chip tapeout.
• Conduct low power design; perform power and IR drop analysis.
• Perform DFT insertion in logic compilation environment.
• Perform formal verification to check logic equivalency between golden and revised design.
• Participate in logic design for timing critical blocks.
• Work closely with and support physical design engineers in Place and Route and design integration.
• Research and evaluate advanced design flows and methodologies for Automotive Ethernet products.
  

Requirements

• Master’s Degree in Electronics/Electrical Engineering or related fields with coursework in digital logic design, computer architecture.
• 4~8 years of hand-on experience in digital design, running EDA tools for simulation, synthesis, timing analysis and formal verification.
• Solid knowledge and background in ASIC development.
• Proficiency in Linux shell scripting and scripting languages such as Perl, Python, Tcl, and Make.
• Having passion in technology; being flexible, goal oriented, and team player.
• Excellent verbal and written communication skills.
• RTL coding experience/DFT design experience is a plus.
• Advanced technology and large SOC chip signoff experience is a plus.
  

The Perks

With competitive compensation and great benefits, you will enjoy our workstyle within an incredible culture. We’ll give you all the tools you need to succeed so you can grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page.

Your Future

Marvell provides a work environment that promotes employee growth and development. We are searching for an individual who wants to grow with the company and will strive to improve performance. If you are driven, personable, and energetic, there will be additional opportunities for you here at Marvell.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.