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수평: Mid-Senior level
직업 종류: Full-time
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작업 내용
As part of your role, you will be responsible for developing and oversee design benchmarking cases for advanced process nodes. This will involve collaborating closely with IP and EDA teams, and perform various tasks such as synthesis, DFT, APR, RC extraction, ECO, STA and power analysis. Additionally, you will be tasked with implementing design automation flow and data analysis infrastructure.
You will also work with the market team and end users to promote signoff guidance and customize signoff specifications to meet the needs of end user. Furthermore, you will conduct research in the field of AI/ML to enhance signoff quality and productivity.
Qualification
- Key Qualification
- The candidate for this position should possess a Master degree or higher in Electronics Engineering or Computer Science, along with 6 years of relevant work experience.
- Experience in synthesis, physical design methodology, RC extraction, static timing analysis (STA), power signoff and DRC/LVS is essential for this role.
- The candidate should have a strong grasp of scripting techniques using Perl, TCL, Python.
- The proven ability to collaborate and communicate effectively in a multi-culture environment is a must-have skill for this position.
- Preferred Qualifications
- Demonstrated expertise in utilizing AI/ML toolsets for data analysis
- Experience in circuit spice simulation
- Experience in tape-out in advanced technology process nodes
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마감 시간: 20-12-2024
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작업 보고
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동일한 작업
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⏰ 06-12-2024🌏 Zhubei City, Hsinchu County
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⏰ 06-12-2024🌏 Zhubei City, Hsinchu County
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⏰ 06-12-2024🌏 Zhubei City, Hsinchu County