수평: Entry level

직업 종류: Full-time

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작업 내용

Description

What You Will Do In Your Role

Primary Purpose
  • Provide signal/power integrity support for new and/or existing high speed interconnect solutions, especially for subtrate application.
Duties & Responsibilities
  • Lead the design and development of the new and/or existing package interconnect technology with in depth experience in package technology, package fab & tape-out/gerber process.
  • Responsible for the package layout design/routing work with the inclusion of the package and routing requirement that meet SI, PI, EMI, and Thermal.
  • Perform 3D modeling and analysis to verify/optmize/fix the SI/PI for new and/or existing package and other interconnect solutions.
  • Develop and implement test vehicles. Perform characterization through the use of high-speed digital testing and electromagnetic modelling techniques.
  • Generate evaluation and qualification reports or presentation materials for both internal and customer use.
  • Provide expert advice to Marketing, Sales and/or customers on package SI/PI related matters.
  • Be up-to-date with industry trend on package technology, high speed connector requirements and disseminate / share information among team members
  • Working with customers on various high-speed serial I/O, Back plane, Board-to-Board and Channel applications
  • Other duties as assigned by the Management
SCOPE: This job supports both overseas as well as Taiwan-based employees of Molex.

The Experience You Will Bring

Requirements

EDUCATION: REQUIRED:
  • Degree in Electrical Engineering or equivalent
Preferred
  • Master or bachelor of Engineering (Electrical & Electronics or Bachelor of Science (Physics))
WORK EXPERIENCE: REQUIRED:
  • At least 5 years and above of related working experience for a degree holder
Preferred
  • Experience in package layout design with in-depth experience in package design and routing/DFM rules, fab& tape-out/gerber process. Experience/knowledge in package technology/architecture is a plus.
  • Experience in SI analysis, 3D modeling and familiar with the package design and routing guideline to meet SI, PI, EMI, and Thermal.
  • Experience with available CAD/CAE tools such as Cadence Allegro Package Designer, Ansoft 3D layout and HFSS, and Agilent ADS & PLTS is a plus.
  • Correlation experience with lab measurements using oscilloscopes, TDRs and VNAs.
What Will Put You Ahead

Skills & Abilities

REQUIRED:
  • Package Layout and Architectural Design; Signal Integrity/Electromagnetics PREFERRED:
  • Silicon design
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마감 시간: 20-12-2024

무료 후보 신청 클릭

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