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CPU Power Engineer
전망: 102
갱신일: 05-11-2024
위치: Banqiao District New Taipei City
직업 종류: Full-time
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작업 내용
Google welcomes people with disabilities.Minimum qualifications:
- Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
- 3 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or SystemVerilog.
- Experience with low-power dynamic and leakage, power estimation, as well as data analytics, and profiling.
- Experience in flow automation (e.g., Python, C, C++).
- 3 years of experience in RTL design and low-power design techniques.
- Experience with the concept of power management, retention, or Dynamic Voltage and Frequency Scaling (DVFS).
- Experience with vendor tools (e.g., PTPX, Ansys Power Artist, Synopses Prime Power RTL).
- Experience with CPU bench-marking, performance analysis, and competitive study.
- Knowledge of CPU micro-architecture.
Our computational challenges are so big, complex and unique we can’t just purchase off-the-shelf hardware, we’ve got to make it ourselves. Your team designs and builds the hardware, software and networking technologies that power all of Google’s services. As a Hardware Engineer, you design and build the systems that are the heart of the world’s largest and most powerful computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data centers affecting millions of Google users.
With your technical expertise, you lead projects in multiple areas of expertise (i.e., engineering domains or systems) within a data center facility, including construction and equipment installation/troubleshooting/debugging with vendors.
Responsibilities
- The Google CPU Power Team wants to recruit a talented individual contributor engineer to own and drive several activities related to architecture energy modeling, competitive performance and power analysis, power optimization, simulation and rollups.
- The qualified engineer will also collaborate with the SoC Power Team in Taiwan on various power projections and requirements for our CPU. This includes silicon power capture of competitor CPUs for benchmarks and other daily workloads.
- Perform data mining analysis at the RTL and gate-level to define relevant micro-architectural transactions for high-level power estimation.
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마감 시간: 20-12-2024
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동일한 작업
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⏰ 05-12-2024🌏 Banqiao District, New Taipei City
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⏰ 05-12-2024🌏 Banqiao District, New Taipei City
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⏰ 05-12-2024🌏 Banqiao District, New Taipei City
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⏰ 05-12-2024🌏 Banqiao District, New Taipei City
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⏰ 05-12-2024🌏 Banqiao District, New Taipei City
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⏰ 05-12-2024🌏 Banqiao District, New Taipei City
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⏰ 05-12-2024🌏 Banqiao District, New Taipei City
-
⏰ 05-12-2024🌏 Banqiao District, New Taipei City
Loading ...
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⏰ 05-12-2024🌏 Banqiao District, New Taipei City
-
⏰ 05-12-2024🌏 Banqiao District, New Taipei City