Physical Design Engineer

☞ Sintegra Inc.

見る: 99

更新日: 05-11-2024

場所: New Taipei City

カテゴリー: ハイテク 機械/技術 電気/電子工学 IT-ソフトウェア

業界: Semiconductor Manufacturing

レベル: Mid-Senior level

ジョブタイプ: Full-time

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仕事内容

Looking for Block Level Physical Design/ Verification for a 3nm/5nm.

The candidate will be executing P&R tools on a high speed digital semi-custom layout

  • Candidate will assist the DE Leads in executing structural design including Synthesis runs, P&R, APR, Performance Verification involving static timing analysis, FEV and layout verification. Required Skills: ASIC and SoC design experience, Physical design CAD flows and Design convergence. Includes synthesis, APR, STA, LVS and debug.
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締切: 20-12-2024

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