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Sr. Staff Engineer, Digital IC Design
Visualizza: 146
Giorno di aggiornamento: 05-11-2024
Località: Zhubei City Hsinchu County
Categoria: Alta tecnologia Meccanico / Tecnico Elettrico / Elettronico IT - Software
Industria: Semiconductor Manufacturing
Posizione: Mid-Senior level
Tipo di lavoro: Full-time
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Contenuto del lavoro
About MarvellAt Marvell, we believe that infrastructure powers progress. That execution is as essential as innovation. That better collaboration builds better technology. Trusted by the world’s leading technology companies for 25 years, we move, store, process and secure the world’s data with semiconductor solutions designed for our customers’ current needs and future ambitions. Through a process of deep collaboration and transparency, we’re ultimately changing the way tomorrow’s enterprise, cloud, automotive, and carrier architectures transform—for the better.The data infrastructure that our customers build has never been more critical to our global economy. It’s what’s keeping the world connected, businesses running, and information flowing. If you’re ready to excel, innovate, and truly enjoy your work, apply now for the position detailed below.The OpportunityCentral Engineering AMS-IP team provides leading-edge SerDes PHY solutions and other Analog Mixed-Signal IPs to support all Marvell products.Job ResponsibilitiesASIC design engineer responsible for the design, verification and evaluation of digital circuits in high-speed data communication ICs. The candidate will be involved in engineering implementation spec writing from system requirements, RTL design, verification, synthesis, static timing analysis.The responsibilities include but not limited to.- Improve the design methodology and flow.
- RTL designs for various type of SerDes IPs ranging from 10Gbps to 224Gbps data-rates for different applications.
- Collaborate with Analog/DSP/DV/FW/AE teams to deliver the competitive SerDes IP solutions for all the Marvell product lines.
- Provide the support to the product teams, for both pre and post silicon
- Fundamental concepts in digital logic design
- Concepts digital logic timing analysis
- Verilog/VHDL coding and Lint tools
- Strong Perl, Python and Tcl scripting skill
- PCIe experience
- Micro-controller 8051 or ARM Cortex experience
- Micro-controller firmware experience
- Circuit level or custom design experience
- Synthesis using Synopsys or Cadence tools
- Timing analysis using Primetime
- DFT concepts of Scan, BIST
- Chip top RTL integration
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Scadenza: 20-12-2024
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⏰ 06-12-2024🌏 Zhubei City, Hsinchu County
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⏰ 06-12-2024🌏 Zhubei City, Hsinchu County
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⏰ 06-12-2024🌏 Zhubei City, Hsinchu County
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⏰ 06-12-2024🌏 Zhubei City, Hsinchu County