Lead Application Engineer

Contenuto del lavoro

• To provide key technical support in digital IC design implementation product demonstration, and sales presentations.
• To demonstrate strong ability and to be hands-on in full APR flow including floorplan, placement, timing analysis, CTS, signoff timing closure methodology.
• To support key customer engagements on the business increase.
• Have real design tape-out experience especially for advanced node design.
• To play a leading role among other team members, while receive little instruction on routine and general assignments.

• Master with 7+ years working experience or Bachelor with 10+ years’ experience in IC design. (Cadence Innovus experience will be a plus)
• Understanding of full APR flow including timing, congestion analysis and low-power methodology. (Experience for Static Timing Analysis, including SI will be plus)
• Good communication in English and Chinese, good confidence and good self-motivation.
• Be familiar with shell/perl/tcl etc. script language.