CPU DV Lead

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Responsibility

• Contribute to and drive development of Verification strategy and Methodology in RISC-V CPU development
• Scope: Centralize technology team for all product line and future opportunity
• Management: can be Individual contributor or people manager, depends on candidate’s experience

Requirement

• Experiences in CPU design verification, and/or emulation
• Experiences in Constrained Random Verification, Formal verification, Emulation
• Able to define verification strategy best fit for target DUT, conduct verification plan review with team and manage project execution

Location:

• Hsinchu
• San Jose
• Austin