Niveau: Associate

Type d’emploi: Full-time

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le contenu du travail

We are hiring Senior ESD Engineer in Taiwan. (Hsinchu)

Key Responsibilities
  • Responsible for chip ESD design, testing of IP design and ESD layout supervision
  • Responsible for chip testing of ESD and TLP, chip modification and ESD failure performance analysis
  • Document of ESD test plans, design rules and electricity report
  • Establishment of ESD IP database and technical baseline comparison
Key Requirements
  • BS/MS in EE or related majors
  • 4+ years of experience in ESD chip IO design
  • Proficiency in semiconductor circuit component
  • Experienced in foundry process is preferred
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Date limite: 20-12-2024

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MÊMES EMPLOIS

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