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Design Verification CAD Engineer
Vue: 157
Jour de mise à jour: 05-11-2024
Localisation: Banqiao District New Taipei City
Catégorie: Haute technologie Mécanique / Technique Electrique / Electronique IT - Logiciel
Industrie: Information Services Internet
Type d’emploi: Full-time
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le contenu du travail
Google welcomes people with disabilities.Minimum qualifications:
- Bachelor’s degree in Electrical Engineering, Computer Engineering, or Computer Science or equivalent practical experience
- 3 years of experience in Design Verification or related role
- Experience in scripting and automation
- Experience with UVM (Universal Verification Methodology)
- Skilled at verifying digital logic using SystemVerilog
- Solid Unix/Linux command line skills
- Dedication to continuous self development and learning new technologies
Our computational challenges are so big, complex and unique we can’t just purchase off-the-shelf hardware, we’ve got to make it ourselves. Your team designs and builds the hardware, software and networking technologies that power all of Google’s services. As a Hardware Engineer, you design and build the systems that are the heart of the world’s largest and most powerful computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data centers affecting millions of Google users.
The Silicon Engineering Productivity team designs, implements, and supports solutions for hardware engineers to build chips on the Google Cloud Platform. In this role, you will identify the needs of DV engineers and design and deliver solutions based on those needs.
Google’s mission is to organize the world’s information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people’s lives better through technology.
Responsibilities
- Define, enhance, and support a plug and play IP verification infrastructure
- Enhance and support our Design Verification (DV) connectivity and IP packaging flows
- Write code, review code from others, and drive testing plans for code quality
- Gather requirements from stakeholders and prioritize new features and enhancements
- Document flow infrastructure and train users on new systems
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Date limite: 20-12-2024
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MÊMES EMPLOIS
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⏰ 05-12-2024🌏 Banqiao District, New Taipei City
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⏰ 05-12-2024🌏 Banqiao District, New Taipei City
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⏰ 05-12-2024🌏 Banqiao District, New Taipei City
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⏰ 05-12-2024🌏 Banqiao District, New Taipei City
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⏰ 05-12-2024🌏 Banqiao District, New Taipei City
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⏰ 05-12-2024🌏 Banqiao District, New Taipei City
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⏰ 05-12-2024🌏 Banqiao District, New Taipei City
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⏰ 05-12-2024🌏 Banqiao District, New Taipei City
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⏰ 05-12-2024🌏 Banqiao District, New Taipei City
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⏰ 05-12-2024🌏 Banqiao District, New Taipei City