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Staff Test Development Engineer
Ver: 172
Día de actualización: 05-11-2024
Ubicación: Zhubei City Hsinchu County
Categoría: R & D
Industria: Appliances Electrical Electronics Manufacturing Computer Hardware Manufacturing Computers
Tipo de empleo: Full-time
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Contenido de trabajo
Millions of people experience Synaptics every day. Our technology impacts how people see, hear, touch, and engage with a wide range of IoT applications -- at home, at work, in the car or on the go.We solve complex challenges alongside the most influential companies in the industry, using the most advanced algorithms in areas such as machine learning, biometrics and video processing, combined with world class software and silicon development.
Responsibilities
This individual will develop ATE solutions for complex RF (Bluetooth and WLAN) semiconductor products. He/she will develop schematics and direct layout activities for ATE loadboards and probecards for new, innovative, RF ICs. Working closely with OSATs, the test development engineer will release robust production test solutions for offshore manufacturing. In addition, he/she will support cost reduction activities such as test time reduction and yield improvement.
Key Responsibilities
- Lead the ATE development (both HW and SW) for complex RF ICs on Teradyne UltraFLEX
- Jointly develop test plans with cross functional teams to optimize test coverage while minimizing test cost
- Lead the characterization of RF ICs on ATE
- Lead ATE-to-bench correlation activities on critical parameters
- Work closely with development team to define DFT, develop new test methods and debug silicon issues
- Drive test time reduction, increased site count/throughput and yield enhancement activities
- Minimum of 5 years test development experience for RF semiconductor devices
- Proven track record of delivering robust RF IC test solutions for complex products in semiconductor industry
- Excellent communication skills for updating core team members on ATE development status
- Prefer experience with Teradyne UltraFLEX Platform. Advantest 93K SOC knowledge will also be considered
- Knowledge of MBIST, JTAG, SCAN and IDDQ, including vector translation from standard formats to ATE environment
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Plazo: 20-12-2024
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