Senior Mask Layout Design Engineer

Contenido de trabajo

What You’ll Be Doing

:

• Perform physical layout for mixed-signal functions like PLL’s, high speed memory I/O circuits, SerDes, general I/O’s, ESD structures designs in state-of-the-art sub-micron CMOS FinFET technologies using Cadence tools

• Work with ASIC and mixed-signal engineers to customize designs for integration in VLSI products
• Job duties will include floor planning, custom layout and verifying against design rules and schematics
  

What We Need To See

• BSEE with a minimum of 5 years of relevant mask design / layout experience or equivalent experience

• Proven understanding of analog circuit layout concepts in submicron CMOS technologies
• Expert with Cadence custom circuit design tools - particularly virtuoso
• Experience running and debugging DRC and LVS with verification tools such as Dracula, Hercules, Calibre,
• Able to communicate in spoken and written English
• Work effectively in a team, good interpersonal skills, enthusiasm and positive energy.
• Proficiency in scripting languages like perl, python, skill etc.
• Knowledge of DRC and LVS checking flows, ability to customize DRC and LVS decks
  

We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status.

We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive other benefits and privileges of employment. Please contact us to request accommodation.