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Image Signal Processor Modeling Engineer, Silicon
Ver: 131
Día de actualización: 05-11-2024
Ubicación: Banqiao District New Taipei City
Categoría: Otra IT - Software Alta tecnología Mecánica / Técnica Eléctrica / Electrónica
Industria: Information Services Technology Information Internet
Tipo de empleo: Full-time
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Contenido de trabajo
Google welcomes people with disabilities.Minimum qualifications:
- Bachelor’s degree in Computer Science, Electrical Engineering, or equivalent practical experience.
- 2 years of experience programming (C/C++, Python) in industry or research.
- Experience in image and signal processing on chip products.
- Master’s degree in Computer Science or Electrical Engineering.
- Experience in SoC development environment.
- Experience in reference model development.
- Knowledge of image, video and computer vision processing algorithms.
- Proficiency in C or C++ or Python programming.
In this role, you will help develop c-model architecture for Image Signal Processor (ISP). You will create and maintain a software environment for reference ISP c-models, and develop a system model that expands the team to work across organizations for ISP integration. You will work with ISP architects, implementation designers, verification engineers, and software engineers, providing bit-accurate system c-models and specifications.
Google’s mission is to organize the world’s information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people’s lives better through technology.
Responsibilities
- Create and maintain software architecture for next generation ISP system.
- Implement, model, analyze, and test ISP algorithm pipeline.
- Develop a software environment for ISP system development and simulation.
- Support delivery of ISP c-models for implementation, verification, and SoC system.
- Integrate the ISP c-models into a tuning and pre-silicon software environment.
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Plazo: 20-12-2024
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