CAD Engineer, Physical Verification

Contenido de trabajo

Due to the current health crisis related to COVID-19 and the escalating visa/travel restrictions in place, we’re currently unable to extend offers to anyone who cannot work from Taiwan due to lockdown visa/travel restrictions, or other restrictive measures until further notice. Consequently, we will be prioritizing candidates who can start in this location by set date as expected. We’re keeping the situation under review and would adjust our position should the restrictive measures be removed later on.

Minimum qualifications:

• Bachelor’s degree in Electrical Engineering or Computer Science, or equivalent practical experience.
• 5 years of relevant work experience.
• 2 years of experience in using and/or maintaining physical verification flows.
• Scripting experience in TCL and either Python or Perl.

Preferred qualifications:

• Master’s or PhD degree in Electrical Engineering or Computer Science, or equivalent practical experience.
• Experience in ASIC physical design closure, flows, and methodologies in process nodes at 40nm and below.
• Experience with multiple foundries.
• Experience enabling one or more aspects of physical verification flow/methodology to successful tape-outs and shipping silicon.
• Experience with ASIC design tools: Design Compiler/Genus, ICC2/Innovus, Primetime/Tempus/Tweaker, Calibre/IC Validator/Pegasus.

About The Job

Google engineers develop the next-generation technologies that change how users connect, explore, and interact with information and one another. As a member of an extraordinarily creative, motivated and talented team, you develop new products that are used by millions of people. We need our engineers to be versatile and passionate to take on new problems as we continue to push technology forward. If you get excited about building new things and working across discipline lines, then our team might be your next career step.

Join us in Google’s Engineering Productivity team and contribute to the development of differentiated products that combine the best of Google AI, hardware, and software. Our charter is to continually improve the productivity of our Silicon execution team to develop solutions, optimizing performance and power for our targeted use cases.

Google’s mission is to organize the world’s information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people’s lives better through technology.

Responsibilities

• Develop and maintain physical verification flows utilizing state-of-the-art tools and methodologies for block and full-chip convergence.
• Analyze flow results, with an eye toward improving designer efficiency, runtime, and memory usage.
• Provide documentation and support to engineers using these flows to maximize their productivity and quality of results.
• Build flow regressions and dashboards to demonstrate flow quality.
• Partner with other members of the CAD team to build cross-tool flow infrastructure.

Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google’s EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing this form .