Jobtyp: Full-time

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Jobinhalt

※ Job Contents:

1. Responsible for physical design flow development including APR, SI, IR, CTS, timing closure methodology development, flow automation

2. Project support/execution & collaboration with EDA vendors

3. APR flow/scripts/environment development for advanced process nodes

※ Requirements:

1. Experience in APR, hierarchical design flow

2. Experience in physical design project execution

3. Familiar with Cadence Encounter/EDI or Synopsys ICC/ICC2

4. Knowledge with script and programming (TCL/Perl/...) skills

5. Better to has

* 40/28/16nm IC design experiences

* Team management experience

* Low power design experience

* Verification (RC-extraction & STA/SI & PV) experience

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Frist: 20-12-2024

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