Jobtyp: Full-time

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Jobinhalt

Qualifications:

@Master’s degree or above in Electronics, Microelectronics, or related fields, or exceptionally outstanding undergraduate students.

@At least 2 years of experience in ASIC/IP/SOC design, with Tape out experience.

@Proficiency in Verilog HDL and familiarity with digital IC design, verification, and testing processes.

@Proficient in using common digital circuit design EDA tools.

@Familiarity with C/C++.

@Excellent communication skills and ability to work in a team.

@Prior experience with ISP algorithms is preferred.

@Priority given to candidates with experience in high-speed interface design.

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Frist: 20-12-2024

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