Position: Internship

Jobtyp: Full-time

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Jobinhalt

We are looking for an ASIC design engineer for the SOC/IP design team in Taiwan. The team is involved in SOC project and IP developments. In this position, you will have the chance to work on SOC design as well as processors, accelerators, multimedia, interconnect, bridge, high speed IO IPs for our SOC chips.

What You Will Be Doing

  • SOC or IP level front-end design.
  • Perform design quality checks.
  • Co-work with design verification engineers to ensure that the design is functional.

What We Need To See

  • Masters Degree in EE, CS or CE or equivalent work experience.
  • Project experience in IC design implementation.
  • Proficiency with Verilog and System Verilog.
  • Have taken digital design courses.

Ways To Stand Out From The Crowd

  • Experience in writing C++/SystemC models.
  • Scripting experience in Python, Perl, tcl, Make, shell.

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Frist: 20-12-2024

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