Architect lead, ASIC Power and Performance

Jobinhalt

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Minimum qualifications:

• Bachelor’s degree or equivalent practical experience.
• 15 years of experience in semiconductor design and development with a focus on low power.
• Experience with management and leadership.
  
  

Preferred qualifications:

• Master’s degree or PhD degree in Electronics or Computer Engineering, with an emphasis on computer architecture, performance, power analysis.
• Experience in managing silicon teams working on power and performance (i.e., pre-si and post-si).
• Experience with low power architectures, power optimization techniques, power modeling, estimation, and post-silicon validation.
• Experience with performance modeling, pre-si projections and post-si validation, and tuning.
• Experience in managing and delivering on power and performance targets at IP and system on a chip (SoC) level throughout design and production.
• Ability to influence others with engineering solutions, and attract and motivate talent, with excellent communication skills.
  
  

About The Job

You will be responsible for the design, prediction, and measurement of power characteristics of leading edge consumer electronic devices. This will include evaluation of device level characteristics, identification of performance bottlenecks, and architectural improvements in hardware and software. You will work closely with internal team and external vendors to optimize power and performance throughout the system. You will be responsible for detailed reporting of power consumption, performance, efficiency, and analysis of complex hardware and software interactions.

Google’s mission is to organize the world’s information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people’s lives better through technology.

Responsibilities

• Lead a team of power and performance engineers working on multiple complex tape-outs and post-silicon optimizations. Grow and develop a high performing team through recruitment of new members and development of the existing team.
• Define power key performance indicators (KPIs) and goals, guide architecture, design and implementation to achieve goals, and track power throughout the design cycle. Define use case data flows and workloads and model them for high performance mobile SoCs.
• Manage and mitigate technology risks for complex projects. Participate in design reviews and track issue resolution.
• Identify power and performance improvements applicable at different design levels, and collaborate with a variety of teams to implement proposed improvements.
• Collaborate with teams across Google to identify and create strategic opportunities for custom silicon innovation to advance Google business. Engage in technical and schedule trade-off discussions.
  
  

Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google’s EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form .