類比設計工程師 (10-631)

Jobinhalt

IP design center of a International IC Design House

Responsibilities

Responsibilities:

• Responsible for High speed SerDes PHY design and will involved below diversified interface protocols e.g. USB 3.1, DP, PCI-E, MIPI MPHY, LPDDR4/5 PHY
• Cross-department coordination and communication to drive project delivery on time
  

Experience

• At least three year of working experience with High-Speed Interface PHY development
• Experienced/interested in one or multiple of Synopsys Astro/ICC, Cadence SOCE.
• Interested in taking the challenges of 28nm and below physical designs
  

Education

MS degree with Engineer major (e.g. EE or CS) .