ASIC Architect

Job content

Google welcomes people with disabilities.

Due to the current health crisis related to COVID-19 and the escalating visa/travel restrictions in place, we’re currently unable to extend offers to anyone who cannot work from Taiwan due to lockdown visa/travel restrictions, or other restrictive measures until further notice. Consequently, we will be prioritizing candidates who can start in this location by set date as expected. We’re keeping the situation under review and would adjust our position should the restrictive measures be removed later on.

Minimum qualifications:

• Bachelor’s degree in Engineering field or equivalent practical experience.
• Experience in ASIC architecture or graduate coursework in computer architecture.
• Experience in two or more of the following: CPU, GPU, ISP, display, video codecs, memory controllers, fabrics, compression, or storage.
  
  

Preferred qualifications:

• Master’s degree or PhD in Computer Science, Electrical Engineering or related field with 3 years of related working experience.
• Experience designing/implementing or validating RTL in related fields.
• Detailed knowledge of software/hardware system flows for device use cases.
• Knowledge of OS, Firmware, software stack.
  
  

About The Job

Our computational challenges are so big, complex and unique we can’t just purchase off-the-shelf hardware, we’ve got to make it ourselves. Your team designs and builds the hardware, software and networking technologies that power all of Google’s services. As a Hardware Engineer, you design and build the systems that are the heart of the world’s largest and most powerful computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data centers affecting millions of Google users.

As a member of the ASIC Architecture team, you will collaborate with hardware designers and architects to ensure ASIC performance and power meet design and product requirements. Your key responsibilities will be developing and building new pre-Silicon tools, running experiments, and analyzing results. As part of this work, you will participate in the development of technology in compute, media, fabric, memory, etc., and contribute to designs.

Google’s mission is to organize the world’s information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people’s lives better through technology.

Responsibilities

• Work with cross-functional teams to define IP, Subsystem and ASIC specifications to meet target PPA requirements.
• Collaborate with other teams on pre-silicon performance/power analysis, evaluating design trade-off, writing test and validation plan and resolving implementation issues. As well as post-silicon chip bring-ups and deep-dive into perf/power/functional issues.
• Perform analysis results in both qualitative and quantitative fashion effectively.
• Participate in evaluation of future ASIC designs and general architecture.
  
  

Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google’s EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form .